mirror of
https://github.com/kubernetes-sigs/node-feature-discovery.git
synced 2024-12-14 11:57:51 +00:00
fa2f008d18
Add new cpuid label "feature.node.kubernetes.io/cpu-cpuid.AVX10_VERSION" that advertises the supported version of AVX10 vector ISA. Correspondingly, the patch adds AVX10_VERSION to the "cpu.cpuid" feature for NodeFeatureRules to consume. This makes cpu.cpuid on amd64 architecture a "multi-type" feature in that it contains "flags" and potentially also "attributes" (the only cpuid attribute so far is the AVX10_VERSION).
157 lines
6.4 KiB
Go
157 lines
6.4 KiB
Go
/*
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Copyright 2019 The Kubernetes Authors.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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package cpu
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/*
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#include <sys/auxv.h>
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unsigned long gethwcap() {
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return getauxval(AT_HWCAP);
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}
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unsigned long gethwcap2() {
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return getauxval(AT_HWCAP2);
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}
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*/
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import "C"
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/*
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all special features for ppc64le should be defined here; canonical list:
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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/include/uapi/asm/cputable.h
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*/
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const (
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/* AT_HWCAP features */
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PPC_FEATURE_32 = 0x80000000 /* 32-bit mode. */
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PPC_FEATURE_64 = 0x40000000 /* 64-bit mode. */
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PPC_FEATURE_601_INSTR = 0x20000000 /* 601 chip, Old POWER ISA. */
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PPC_FEATURE_HAS_ALTIVEC = 0x10000000 /* SIMD/Vector Unit. */
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PPC_FEATURE_HAS_FPU = 0x08000000 /* Floating Point Unit. */
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PPC_FEATURE_HAS_MMU = 0x04000000 /* Memory Management Unit. */
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PPC_FEATURE_HAS_4xxMAC = 0x02000000 /* 4xx Multiply Accumulator. */
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PPC_FEATURE_UNIFIED_CACHE = 0x01000000 /* Unified I/D cache. */
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PPC_FEATURE_HAS_SPE = 0x00800000 /* Signal Processing ext. */
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PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000 /* SPE Float. */
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PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000 /* SPE Double. */
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PPC_FEATURE_NO_TB = 0x00100000 /* 601/403gx have no timebase */
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PPC_FEATURE_POWER4 = 0x00080000 /* POWER4 ISA 2.00 */
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PPC_FEATURE_POWER5 = 0x00040000 /* POWER5 ISA 2.02 */
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PPC_FEATURE_POWER5_PLUS = 0x00020000 /* POWER5+ ISA 2.03 */
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PPC_FEATURE_CELL_BE = 0x00010000 /* CELL Broadband Engine */
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PPC_FEATURE_BOOKE = 0x00008000 /* ISA Category Embedded */
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PPC_FEATURE_SMT = 0x00004000 /* Simultaneous Multi-Threading */
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PPC_FEATURE_ICACHE_SNOOP = 0x00002000
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PPC_FEATURE_ARCH_2_05 = 0x00001000 /* ISA 2.05 */
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PPC_FEATURE_PA6T = 0x00000800 /* PA Semi 6T Core */
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PPC_FEATURE_HAS_DFP = 0x00000400 /* Decimal FP Unit */
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PPC_FEATURE_POWER6_EXT = 0x00000200 /* P6 + mffgpr/mftgpr */
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PPC_FEATURE_ARCH_2_06 = 0x00000100 /* ISA 2.06 */
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PPC_FEATURE_HAS_VSX = 0x00000080 /* P7 Vector Extension. */
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PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040
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/* Reserved by the kernel. 0x00000004 Do not use. */
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PPC_FEATURE_TRUE_LE = 0x00000002
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PPC_FEATURE_PPC_LE = 0x00000001
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)
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const (
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/* AT_HWCAP2 features */
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PPC_FEATURE2_ARCH_2_07 = 0x80000000 /* ISA 2.07 */
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PPC_FEATURE2_HAS_HTM = 0x40000000 /* Hardware Transactional Memory */
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PPC_FEATURE2_HAS_DSCR = 0x20000000 /* Data Stream Control Register */
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PPC_FEATURE2_HAS_EBB = 0x10000000 /* Event Base Branching */
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PPC_FEATURE2_HAS_ISEL = 0x08000000 /* Integer Select */
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PPC_FEATURE2_HAS_TAR = 0x04000000 /* Target Address Register */
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PPC_FEATURE2_HAS_VEC_CRYPTO = 0x02000000 /* Target supports vector instruction. */
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PPC_FEATURE2_HTM_NOSC = 0x01000000 /* Kernel aborts transaction when a syscall is made. */
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PPC_FEATURE2_ARCH_3_00 = 0x00800000 /* ISA 3.0 */
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PPC_FEATURE2_HAS_IEEE128 = 0x00400000 /* VSX IEEE Binary Float 128-bit */
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PPC_FEATURE2_DARN = 0x00200000 /* darn instruction. */
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PPC_FEATURE2_SCV = 0x00100000 /* scv syscall. */
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PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000 /* TM without suspended state. */
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PPC_FEATURE2_ARCH_3_1 = 0x00040000 /* ISA 3.1 */
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PPC_FEATURE2_MMA = 0x00020000 /* Matrix Multiply Assist */
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)
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var flagNames_ppc64le = map[uint64]string{
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PPC_FEATURE_32: "PPC32",
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PPC_FEATURE_64: "PPC64",
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PPC_FEATURE_601_INSTR: "PPC601",
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PPC_FEATURE_HAS_ALTIVEC: "ALTIVEC",
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PPC_FEATURE_HAS_FPU: "FPU",
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PPC_FEATURE_HAS_MMU: "MMU",
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PPC_FEATURE_HAS_4xxMAC: "4xxMAC",
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PPC_FEATURE_UNIFIED_CACHE: "UCACHE",
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PPC_FEATURE_HAS_SPE: "SPE",
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PPC_FEATURE_HAS_EFP_SINGLE: "EFPFLOAT",
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PPC_FEATURE_HAS_EFP_DOUBLE: "EFPDOUBLE",
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PPC_FEATURE_NO_TB: "NOTB",
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PPC_FEATURE_POWER4: "POWER4",
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PPC_FEATURE_POWER5: "POWER5",
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PPC_FEATURE_POWER5_PLUS: "POWER5+",
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PPC_FEATURE_CELL_BE: "CELLBE",
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PPC_FEATURE_BOOKE: "BOOKE",
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PPC_FEATURE_SMT: "SMT",
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PPC_FEATURE_ICACHE_SNOOP: "IC_SNOOP",
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PPC_FEATURE_ARCH_2_05: "ARCH_2_05",
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PPC_FEATURE_PA6T: "PA6T",
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PPC_FEATURE_HAS_DFP: "DFP",
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PPC_FEATURE_POWER6_EXT: "POWER6X",
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PPC_FEATURE_ARCH_2_06: "ARCH_2_06",
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PPC_FEATURE_HAS_VSX: "VSX",
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PPC_FEATURE_PSERIES_PERFMON_COMPAT: "ARCHPMU",
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PPC_FEATURE_TRUE_LE: "TRUE_LE",
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PPC_FEATURE_PPC_LE: "PPCLE",
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}
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var flag2Names_ppc64le = map[uint64]string{
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PPC_FEATURE2_ARCH_2_07: "ARCH_2_07",
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PPC_FEATURE2_HAS_HTM: "HTM",
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PPC_FEATURE2_HAS_DSCR: "DSCR",
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PPC_FEATURE2_HAS_EBB: "EBB",
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PPC_FEATURE2_HAS_ISEL: "ISEL",
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PPC_FEATURE2_HAS_TAR: "TAR",
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PPC_FEATURE2_HAS_VEC_CRYPTO: "VCRYPTO",
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PPC_FEATURE2_HTM_NOSC: "HTM-NOSC",
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PPC_FEATURE2_ARCH_3_00: "ARCH_3_00",
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PPC_FEATURE2_HAS_IEEE128: "IEEE128",
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PPC_FEATURE2_DARN: "DARN",
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PPC_FEATURE2_SCV: "SCV",
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PPC_FEATURE2_HTM_NO_SUSPEND: "HTM-NO-SUSPEND",
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PPC_FEATURE2_ARCH_3_1: "ARCH_3_1",
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PPC_FEATURE2_MMA: "MMA",
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}
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func getCpuidFlags() []string {
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r := make([]string, 0, 30)
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hwcap := uint64(C.gethwcap())
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hwcap2 := uint64(C.gethwcap2())
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for i := uint(0); i < 64; i++ {
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key := uint64(1 << i)
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val, ok := flagNames_ppc64le[key]
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if hwcap&key != 0 && ok {
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r = append(r, val)
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}
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}
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for i := uint(0); i < 64; i++ {
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key := uint64(1 << i)
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val, ok := flag2Names_ppc64le[key]
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if hwcap2&key != 0 && ok {
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r = append(r, val)
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}
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}
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return r
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}
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func getCpuidAttributes() map[string]string { return nil }
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