From ddfccb49071bfbf92adbf658ead4347c239fcb27 Mon Sep 17 00:00:00 2001 From: Yaakov Selkowitz Date: Thu, 13 Oct 2022 14:13:31 -0400 Subject: [PATCH 1/5] cpu: update ARM CPU flags through v8.3 --- source/cpu/cpuid_arm64.go | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/source/cpu/cpuid_arm64.go b/source/cpu/cpuid_arm64.go index e4175ae49..5762a4e69 100644 --- a/source/cpu/cpuid_arm64.go +++ b/source/cpu/cpuid_arm64.go @@ -52,6 +52,15 @@ const ( CPU_ARM64_FEATURE_ASIMDDP CPU_ARM64_FEATURE_SHA512 CPU_ARM64_FEATURE_SVE + CPU_ARM64_FEATURE_ASIMDFHM + CPU_ARM64_FEATURE_DIT + CPU_ARM64_FEATURE_USCAT + CPU_ARM64_FEATURE_ILRCPC + CPU_ARM64_FEATURE_FLAGM + CPU_ARM64_FEATURE_SSBS + CPU_ARM64_FEATURE_SB + CPU_ARM64_FEATURE_PACA + CPU_ARM64_FEATURE_PACG ) var flagNames_arm64 = map[uint64]string{ @@ -78,6 +87,15 @@ var flagNames_arm64 = map[uint64]string{ CPU_ARM64_FEATURE_ASIMDDP: "ASIMDDP", CPU_ARM64_FEATURE_SHA512: "SHA512", CPU_ARM64_FEATURE_SVE: "SVE", + CPU_ARM64_FEATURE_ASIMDFHM: "ASIMDFHM", + CPU_ARM64_FEATURE_DIT: "DIT", + CPU_ARM64_FEATURE_USCAT: "USCAT", + CPU_ARM64_FEATURE_ILRCPC: "ILRCPC", + CPU_ARM64_FEATURE_FLAGM: "FLAGM", + CPU_ARM64_FEATURE_SSBS: "SSBS", + CPU_ARM64_FEATURE_SB: "SB", + CPU_ARM64_FEATURE_PACA: "PACA", + CPU_ARM64_FEATURE_PACG: "PACG", } func getCpuidFlags() []string { From 70883df5f6fb6ac7e8026754e4e3f74bea66b2a2 Mon Sep 17 00:00:00 2001 From: Yaakov Selkowitz Date: Thu, 13 Oct 2022 16:54:37 -0400 Subject: [PATCH 2/5] cpu: update ARM CPU flags through v9.2 --- source/cpu/cpuid_arm64.go | 86 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/source/cpu/cpuid_arm64.go b/source/cpu/cpuid_arm64.go index 5762a4e69..a43b283d1 100644 --- a/source/cpu/cpuid_arm64.go +++ b/source/cpu/cpuid_arm64.go @@ -23,6 +23,9 @@ package cpu unsigned long gethwcap() { return getauxval(AT_HWCAP); } +unsigned long gethwcap2() { + return getauxval(AT_HWCAP2); +} */ import "C" @@ -63,6 +66,44 @@ const ( CPU_ARM64_FEATURE_PACG ) +const ( + /* extension instructions */ + CPU_ARM64_FEATURE2_DCPODP = 1 << iota + CPU_ARM64_FEATURE2_SVE2 + CPU_ARM64_FEATURE2_SVEAES + CPU_ARM64_FEATURE2_SVEPMULL + CPU_ARM64_FEATURE2_SVEBITPERM + CPU_ARM64_FEATURE2_SVESHA3 + CPU_ARM64_FEATURE2_SVESM4 + CPU_ARM64_FEATURE2_FLAGM2 + CPU_ARM64_FEATURE2_FRINT + CPU_ARM64_FEATURE2_SVEI8MM + CPU_ARM64_FEATURE2_SVEF32MM + CPU_ARM64_FEATURE2_SVEF64MM + CPU_ARM64_FEATURE2_SVEBF16 + CPU_ARM64_FEATURE2_I8MM + CPU_ARM64_FEATURE2_BF16 + CPU_ARM64_FEATURE2_DGH + CPU_ARM64_FEATURE2_RNG + CPU_ARM64_FEATURE2_BTI + CPU_ARM64_FEATURE2_MTE + CPU_ARM64_FEATURE2_ECV + CPU_ARM64_FEATURE2_AFP + CPU_ARM64_FEATURE2_RPRES + CPU_ARM64_FEATURE2_MTE3 + CPU_ARM64_FEATURE2_SME + CPU_ARM64_FEATURE2_SME_I16I64 + CPU_ARM64_FEATURE2_SME_F64F64 + CPU_ARM64_FEATURE2_SME_I8I32 + CPU_ARM64_FEATURE2_SME_F16F32 + CPU_ARM64_FEATURE2_SME_B16F32 + CPU_ARM64_FEATURE2_SME_F32F32 + CPU_ARM64_FEATURE2_SME_FA64 + CPU_ARM64_FEATURE2_WFXT + CPU_ARM64_FEATURE2_EBF16 + CPU_ARM64_FEATURE2_SVE_EBF16 +) + var flagNames_arm64 = map[uint64]string{ CPU_ARM64_FEATURE_FP: "FP", CPU_ARM64_FEATURE_ASIMD: "ASIMD", @@ -98,9 +139,47 @@ var flagNames_arm64 = map[uint64]string{ CPU_ARM64_FEATURE_PACG: "PACG", } +var flag2Names_arm64 = map[uint64]string{ + CPU_ARM64_FEATURE2_DCPODP: "DCPODP", + CPU_ARM64_FEATURE2_SVE2: "SVE2", + CPU_ARM64_FEATURE2_SVEAES: "SVEAES", + CPU_ARM64_FEATURE2_SVEPMULL: "SVEPMULL", + CPU_ARM64_FEATURE2_SVEBITPERM: "SVEBITPERM", + CPU_ARM64_FEATURE2_SVESHA3: "SVESHA3", + CPU_ARM64_FEATURE2_SVESM4: "SVESM4", + CPU_ARM64_FEATURE2_FLAGM2: "FLAGM2", + CPU_ARM64_FEATURE2_FRINT: "FRINT", + CPU_ARM64_FEATURE2_SVEI8MM: "SVEI8MM", + CPU_ARM64_FEATURE2_SVEF32MM: "SVEF32MM", + CPU_ARM64_FEATURE2_SVEF64MM: "SVEF64MM", + CPU_ARM64_FEATURE2_SVEBF16: "SVEBF16", + CPU_ARM64_FEATURE2_I8MM: "I8MM", + CPU_ARM64_FEATURE2_BF16: "BF16", + CPU_ARM64_FEATURE2_DGH: "DGH", + CPU_ARM64_FEATURE2_RNG: "RNG", + CPU_ARM64_FEATURE2_BTI: "BTI", + CPU_ARM64_FEATURE2_MTE: "MTE", + CPU_ARM64_FEATURE2_ECV: "ECV", + CPU_ARM64_FEATURE2_AFP: "AFP", + CPU_ARM64_FEATURE2_RPRES: "RPRES", + CPU_ARM64_FEATURE2_MTE3: "MTE3", + CPU_ARM64_FEATURE2_SME: "SME", + CPU_ARM64_FEATURE2_SME_I16I64: "SMEI16I64", + CPU_ARM64_FEATURE2_SME_F64F64: "SMEF64F64", + CPU_ARM64_FEATURE2_SME_I8I32: "SMEI8I32", + CPU_ARM64_FEATURE2_SME_F16F32: "SMEF16F32", + CPU_ARM64_FEATURE2_SME_B16F32: "SMEB16F32", + CPU_ARM64_FEATURE2_SME_F32F32: "SMEF32F32", + CPU_ARM64_FEATURE2_SME_FA64: "SMEFA64", + CPU_ARM64_FEATURE2_WFXT: "WFXT", + CPU_ARM64_FEATURE2_EBF16: "EBF16", + CPU_ARM64_FEATURE2_SVE_EBF16: "SVEEBF16", +} + func getCpuidFlags() []string { r := make([]string, 0, 20) hwcap := uint64(C.gethwcap()) + hwcap2 := uint64(C.gethwcap2()) for i := uint(0); i < 64; i++ { key := uint64(1 << i) val := flagNames_arm64[key] @@ -108,5 +187,12 @@ func getCpuidFlags() []string { r = append(r, val) } } + for i := uint(0); i < 64; i++ { + key := uint64(1 << i) + val := flag2Names_arm64[key] + if hwcap2&key != 0 { + r = append(r, val) + } + } return r } From ebebea55c32d3dc326657c00fdffb92f426ec52c Mon Sep 17 00:00:00 2001 From: Yaakov Selkowitz Date: Thu, 13 Oct 2022 14:14:12 -0400 Subject: [PATCH 3/5] cpu: add POWER10 CPU flags --- source/cpu/cpuid_ppc64le.go | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/source/cpu/cpuid_ppc64le.go b/source/cpu/cpuid_ppc64le.go index 307739717..b628e67b0 100644 --- a/source/cpu/cpuid_ppc64le.go +++ b/source/cpu/cpuid_ppc64le.go @@ -77,6 +77,8 @@ const ( PPC_FEATURE2_DARN = 0x00200000 /* darn instruction. */ PPC_FEATURE2_SCV = 0x00100000 /* scv syscall. */ PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000 /* TM without suspended state. */ + PPC_FEATURE2_ARCH_3_1 = 0x00040000 /* ISA 3.1 */ + PPC_FEATURE2_MMA = 0x00020000 /* Matrix Multiply Assist */ ) var flagNames_ppc64le = map[uint64]string{ @@ -124,6 +126,8 @@ var flag2Names_ppc64le = map[uint64]string{ PPC_FEATURE2_DARN: "DARN", PPC_FEATURE2_SCV: "SCV", PPC_FEATURE2_HTM_NO_SUSPEND: "HTM-NO-SUSPEND", + PPC_FEATURE2_ARCH_3_1: "ARCH_3_1", + PPC_FEATURE2_MMA: "MMA", } func getCpuidFlags() []string { From dc117105eca108372430f6cc9b474141866b5ac3 Mon Sep 17 00:00:00 2001 From: Yaakov Selkowitz Date: Thu, 13 Oct 2022 14:14:29 -0400 Subject: [PATCH 4/5] cpu: update S390 CPU flags --- source/cpu/cpuid_s390x.go | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/source/cpu/cpuid_s390x.go b/source/cpu/cpuid_s390x.go index 339761834..9722472a8 100644 --- a/source/cpu/cpuid_s390x.go +++ b/source/cpu/cpuid_s390x.go @@ -47,10 +47,10 @@ const ( HWCAP_S390_VXRS_PDE = 65536 HWCAP_S390_SORT = 131072 HWCAP_S390_DFLT = 262144 - HWCAP_NR_VXRS_PDE2 = 524288 - HWCAP_NR_NNPA = 1048576 - HWCAP_NR_PCI_MIO = 2097152 - HWCAP_NR_SIE = 4194304 + HWCAP_S390_VXRS_PDE2 = 524288 + HWCAP_S390_NNPA = 1048576 + HWCAP_S390_PCI_MIO = 2097152 + HWCAP_S390_SIE = 4194304 ) var flagNames_s390x = map[uint64]string{ @@ -73,10 +73,10 @@ var flagNames_s390x = map[uint64]string{ HWCAP_S390_VXRS_PDE: "VXP", HWCAP_S390_SORT: "SORT", HWCAP_S390_DFLT: "DFLT", - HWCAP_NR_VXRS_PDE2: "VXP2", - HWCAP_NR_NNPA: "NNPA", - HWCAP_NR_PCI_MIO: "PCIMIO", - HWCAP_NR_SIE: "SIE", + HWCAP_S390_VXRS_PDE2: "VXP2", + HWCAP_S390_NNPA: "NNPA", + HWCAP_S390_PCI_MIO: "PCIMIO", + HWCAP_S390_SIE: "SIE", } func getCpuidFlags() []string { From cba7ad65525a81532efa74a835f6b5e328b77c8f Mon Sep 17 00:00:00 2001 From: Yaakov Selkowitz Date: Fri, 14 Oct 2022 14:04:36 -0400 Subject: [PATCH 5/5] cpu: document canonical sources of supported CPU flags --- source/cpu/cpuid_arm.go | 5 ++++- source/cpu/cpuid_arm64.go | 5 ++++- source/cpu/cpuid_ppc64le.go | 5 ++++- source/cpu/cpuid_s390x.go | 6 +++++- 4 files changed, 17 insertions(+), 4 deletions(-) diff --git a/source/cpu/cpuid_arm.go b/source/cpu/cpuid_arm.go index 6a142e913..a193d9367 100644 --- a/source/cpu/cpuid_arm.go +++ b/source/cpu/cpuid_arm.go @@ -26,7 +26,10 @@ unsigned long gethwcap() { */ import "C" -/* all special features for arm should be defined here */ +/* +all special features for arm should be defined here; canonical list: +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/include/uapi/asm/hwcap.h +*/ const ( /* extension instructions */ CPU_ARM_FEATURE_SWP = 1 << iota diff --git a/source/cpu/cpuid_arm64.go b/source/cpu/cpuid_arm64.go index a43b283d1..ce4472ae2 100644 --- a/source/cpu/cpuid_arm64.go +++ b/source/cpu/cpuid_arm64.go @@ -29,7 +29,10 @@ unsigned long gethwcap2() { */ import "C" -/* all special features for arm64 should be defined here */ +/* +all special features for arm64 should be defined here; canonical list: +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/include/uapi/asm/hwcap.h +*/ const ( /* extension instructions */ CPU_ARM64_FEATURE_FP = 1 << iota diff --git a/source/cpu/cpuid_ppc64le.go b/source/cpu/cpuid_ppc64le.go index b628e67b0..89e49ea17 100644 --- a/source/cpu/cpuid_ppc64le.go +++ b/source/cpu/cpuid_ppc64le.go @@ -28,7 +28,10 @@ unsigned long gethwcap2() { */ import "C" -/* all special features for ppc64le should be defined here */ +/* +all special features for ppc64le should be defined here; canonical list: +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/include/uapi/asm/cputable.h +*/ const ( /* AT_HWCAP features */ PPC_FEATURE_32 = 0x80000000 /* 32-bit mode. */ diff --git a/source/cpu/cpuid_s390x.go b/source/cpu/cpuid_s390x.go index 9722472a8..34565fcbb 100644 --- a/source/cpu/cpuid_s390x.go +++ b/source/cpu/cpuid_s390x.go @@ -25,7 +25,11 @@ unsigned long gethwcap() { */ import "C" -/* all special features for s390x should be defined here */ +/* +all special features for s390x should be defined here; canonical list: +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/s390/include/asm/elf.h +http://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/s390/bits/hwcap.h;hb=HEAD +*/ const ( /* AT_HWCAP features */ HWCAP_S390_ESAN3 = 1