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Merge pull request #322 from adaptant-labs/cpuid-arm
cpu: Add support for ARM/Aarch32 cpuid
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2 changed files with 122 additions and 1 deletions
19
README.md
19
README.md
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@ -250,6 +250,23 @@ capability might be supported but not enabled.
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| AVX | Advanced Vector Extensions (AVX)
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| AVX2 | Advanced Vector Extensions 2 (AVX2)
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#### Arm CPUID Attribute (Partial List)
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| Attribute | Description |
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| --------- | ---------------------------------------------------------------- |
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| IDIVA | Integer divide instructions available in ARM mode
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| IDIVT | Integer divide instructions available in Thumb mode
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| THUMB | Thumb instructions
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| FASTMUL | Fast multiplication
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| VFP | Vector floating point instruction extension (VFP)
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| VFPv3 | Vector floating point extension v3
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| VFPv4 | Vector floating point extension v4
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| VFPD32 | VFP with 32 D-registers
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| HALF | Half-word loads and stores
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| EDSP | DSP extensions
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| NEON | NEON SIMD instructions
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| LPAE | Large Physical Address Extensions
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#### Arm64 CPUID Attribute (Partial List)
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| Attribute | Description |
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@ -660,7 +677,7 @@ If you want to use the latest development version (master branch) you need to
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### System requirements
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1. Linux (x86_64/Arm64)
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1. Linux (x86_64/Arm64/Arm)
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1. [kubectl][kubectl-setup] (properly set up and configured to work with your
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Kubernetes cluster)
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1. [Docker][docker-down] (only required to build and push docker images)
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104
source/cpu/cpuid_arm.go
Normal file
104
source/cpu/cpuid_arm.go
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@ -0,0 +1,104 @@
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/*
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Copyright 2020 The Kubernetes Authors.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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package cpu
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/*
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#include <sys/auxv.h>
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#define HWCAP_CPUID (1 << 11)
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unsigned long gethwcap() {
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return getauxval(AT_HWCAP);
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}
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*/
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import "C"
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/* all special features for arm should be defined here */
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const (
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/* extension instructions */
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CPU_ARM_FEATURE_SWP = 1 << iota
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CPU_ARM_FEATURE_HALF
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CPU_ARM_FEATURE_THUMB
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CPU_ARM_FEATURE_26BIT
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CPU_ARM_FEATURE_FASTMUL
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CPU_ARM_FEATURE_FPA
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CPU_ARM_FEATURE_VFP
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CPU_ARM_FEATURE_EDSP
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CPU_ARM_FEATURE_JAVA
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CPU_ARM_FEATURE_IWMMXT
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CPU_ARM_FEATURE_CRUNCH
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CPU_ARM_FEATURE_THUMBEE
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CPU_ARM_FEATURE_NEON
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CPU_ARM_FEATURE_VFPv3
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CPU_ARM_FEATURE_VFPv3D16
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CPU_ARM_FEATURE_TLS
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CPU_ARM_FEATURE_VFPv4
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CPU_ARM_FEATURE_IDIVA
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CPU_ARM_FEATURE_IDIVT
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CPU_ARM_FEATURE_IDIV
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CPU_ARM_FEATURE_VFPD32
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CPU_ARM_FEATURE_LPAE
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CPU_ARM_FEATURE_EVTSTRM
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CPU_ARM_FEATURE_AES
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CPU_ARM_FEATURE_PMULL
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CPU_ARM_FEATURE_SHA1
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CPU_ARM_FEATURE_SHA2
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CPU_ARM_FEATURE_CRC32
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)
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var flagNames_arm = map[uint64]string{
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CPU_ARM_FEATURE_SWP: "SWP",
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CPU_ARM_FEATURE_HALF: "HALF",
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CPU_ARM_FEATURE_THUMB: "THUMB",
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CPU_ARM_FEATURE_26BIT: "26BIT",
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CPU_ARM_FEATURE_FASTMUL: "FASTMUL",
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CPU_ARM_FEATURE_FPA: "FPA",
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CPU_ARM_FEATURE_VFP: "VFP",
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CPU_ARM_FEATURE_EDSP: "EDSP",
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CPU_ARM_FEATURE_JAVA: "JAVA",
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CPU_ARM_FEATURE_IWMMXT: "IWMMXT",
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CPU_ARM_FEATURE_CRUNCH: "CRUNCH",
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CPU_ARM_FEATURE_THUMBEE: "THUMBEE",
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CPU_ARM_FEATURE_NEON: "NEON",
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CPU_ARM_FEATURE_VFPv3: "VFPv3",
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CPU_ARM_FEATURE_VFPv3D16: "VFPv3D16",
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CPU_ARM_FEATURE_TLS: "TLS",
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CPU_ARM_FEATURE_VFPv4: "VFPv4",
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CPU_ARM_FEATURE_IDIVA: "IDIVA",
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CPU_ARM_FEATURE_IDIVT: "IDIVT",
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CPU_ARM_FEATURE_IDIV: "IDIV",
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CPU_ARM_FEATURE_VFPD32: "VFPD32",
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CPU_ARM_FEATURE_LPAE: "LPAE",
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CPU_ARM_FEATURE_EVTSTRM: "EVTSTRM",
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CPU_ARM_FEATURE_AES: "AES",
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CPU_ARM_FEATURE_PMULL: "PMULL",
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CPU_ARM_FEATURE_SHA1: "SHA1",
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CPU_ARM_FEATURE_SHA2: "SHA2",
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CPU_ARM_FEATURE_CRC32: "CRC32",
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}
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func getCpuidFlags() []string {
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r := make([]string, 0, 20)
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hwcap := uint64(C.gethwcap())
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for i := uint(0); i < 64; i++ {
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key := uint64(1 << i)
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val := flagNames_arm[key]
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if hwcap&key != 0 {
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r = append(r, val)
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}
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}
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return r
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}
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